1. Field
Exemplary embodiments of the present invention relate to an integrated circuit chip capable of recognizing the state of an integrated circuit chip and a semiconductor memory device capable of recognizing the state of a semiconductor memory device.
2. Description of the Related Art
As the integration degree of integrated circuit chips such as memory devices (DRAM and FLASH) increases, an amount of time and cost for testing an integrated circuit chip may increase. Conventionally, to recognize the state of an integrated circuit chip, such as internal temperature, internal voltage, or whether data is normally stored, a separate test pin to output information regarding the state of the integrated circuit chip has been added to the integrated circuit chip, or state information of the integrated circuit chip has been output through a data input/output pin.
When a separate test pin is added to test the integrated circuit chip, the test time and cost are increased by the addition of the test pin. Meanwhile, when the integrated circuit chip is tested by outputting the state information of the integrated circuit chip through a data input/output pin, data stored in a storage unit (for example, a memory cell of a DRAM) cannot be outputted through the data input/output pin while the state information of the chip is outputted through the data input/output pin. Therefore, since a data output test is to be additionally performed to recognize the stored data, the test time and cost may increase.